The MLO/PCB Designer will be part of the PCB Layout Team in the EWS-Final Test (ATE semiconductor), based on the testing platform required by the customer. They will be responsible for executing the layout design to ensure testability quality and manufacturability. Knowledge of semiconductor testing platforms is a plus.
- Design layout of PCBs and Space Transformer (MLO, MLC etc.) high-density multilayers;
- Analyse and draft circuit diagrams;
- Analyse electrical requirements (currents, voltages, frequencies, masses, etc.)
- Provide technical support aimed at meeting customer requirements;
- Generate Gerber files, technical and assembly documentation;
- Carry out feasibility and pre-layout analyses, double-checks, implement work specifications and layout rules
- Bachelor’s degree in electrical engineering or diploma in electronics.
- Excellent aptitude for precision and order.
- Interest in working towards a goal and in international teams, strong interpersonal skills.
- Good knowledge of English
The following skills are a plus:
- Knowledge of CAD tools for design and verification of PCB Layout.
- Excellent knowledge of the layout of high-density multilayer PCBs, including Power, RF, Analog and High speed digital circuit.
- Knowledge of layout rules (IPC), Footprint and Library Management.
- Knowledge of signal and power integrity issues
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